MIPS
Microprocessor without Interlocked Pipelined
Stages or also very commonly known as MIPS is a Reduced Instruction Set
Computing (RISC) microprocessor architecture. Earlier MIPS were developed for 32
bits and later 64 bits were introduced.
MIPS were designed to maximize computer
performance and reduce the cost.
MIPS Memory Allocation
Text segment: this holds the machine
language code for instructions in the source file (user program)
Data segment: this holds the data that
the program operates on. It is divided into two parts
(I
)Static data: contains data that are statically allocated whose size does
not change as the program access them
(II)Dynamic data: allocated
and deallocated by the program executes
Stack segment: this segment resides at
the top of user address space. In a high level language program, local
variables and parameters are pushed and popped on the stack as the operating
systems expands and shrink the stack segment toward the data segment
Registers of MIPS
The MIPS
contains 32 general purpose registers that are numbered as 0-31. Register $o
always contains value 0. Registers $at ($1), $k0 ($26), and $k1 ($27) are
reserved for the assembler and operating system and should not be used by user
programs or compilers.
Registers
$a0-$a3 ($4-$7) are used to pass the first four arguments to routines. Register
$v0 and $v1 ($2 and $3) are used to return values from functions. Registers
$t0-$t9 ($8-15, $24, $25) are caller-saved registers that are used to hold
temporary values.
MIPS REGISTER CONVENTION
Name
|
Register
Number
|
Usage
|
Preserve
on call?
|
$zero
|
0
|
constant 0
(hardware)
|
n.a.
|
$at
|
1
|
reserved for
assembler
|
n.a.
|
$v0 - $v1
|
2-3
|
returned values
|
no
|
$a0 - $a3
|
4-7
|
arguments
|
yes
|
$t0 - $t7
|
8-15
|
temporaries
|
no
|
$s0 - $s7
|
16-23
|
saved values
|
yes
|
$t8 - $t9
|
24-25
|
temporaries
|
no
|
$gp
|
28
|
global pointer
|
yes
|
$sp
|
29
|
stack pointer
|
yes
|
$fp
|
30
|
frame pointer
|
yes
|
$ra
|
31
|
return addr
(hardware)
|
yes
|
MIPS INSTRUCTION FORMAT (R-TYPE, I-TYPE, J-TYPE)
MIPS R2000 Instruction Formats
Op: operation
code
Rs: source
register specifier
Rt:
target register specifier
Rd:
destination register specifier
Shamt: shift
amount
Funct:
function field
Immediate: immediate, branch
displacement or address displacement
Target:
target address
MIPS assembly languages program format
Differentiating C code with MIPS assembly language
C code:
i = N*N + 3*N
MIPS assembly language
lw $t0, 4($gp) #
fetch N
mult $t0, $t0, $t0 #
N*N
lw $t1, 4($gp) # fetch N
ori $t2, $zero, 3 #
3
mult $t1, $t1, $t2 #
3*N
add $t2, $t0, $t1 #
N*N + 3*N
sw $t2, 0($gp) # i =
XXX
C code:
A[i] = A[i/2] + 1; A[i+1] =
-1;
MIPS assembly language
# A[i] = A[i/2] + 1;
lw $t0,
0($gp) # fetch i
srl $t0, $t0,
1 # i/2
addi $t1, $gp,
28 # &A[0]
sll $t0, $t0,
2 # turn i/2 into a
byte offset (*4)
add $t1, $t1,
$t0 # &A[i/2]
lw $t1,
0($t1) # fetch A[i/2]
addi $t1, $t1,
1 # A[i/2] + 1
lw $t0,
0($gp) # fetch i
sll $t0, $t0,
2 # turn i into a byte
offset
addi $t2, $gp,
28 # &A[0]
add $t2, $t2,
$t0 # &A[i]
sw $t1,
0($t2) # A[i] = ...
# A[i+1] = -1;
lw $t0,
0($gp) # fetch i
addi $t0, $t0,
1 # i+1
sll $t0, $t0,
2 # turn i+1 into a
byte offset
addi $t1, $gp,
28 # &A[0]
add $t1, $t1,
$t0 # &A[i+1]
addi $t2, $zero,
-1 # -1
sw $t2,
0($t1) # A[i+1] = -1
No comments:
Post a Comment